Key Features

  • Up to 64 channels coupled to a large Virtex-6 FPGA
  • High Channel density yielding the lowest 125 MSPS cost per channel in the industry
  • Optional Intel Quad-Core i7 (embedded version)
  • 125 MSPS ADCs, 14 bit resolution
  • Phase aligned channels and phase coherent sampling
  • GigE and PCIe 4x high speed interfaces
  • AC-DC coupling options, single-ended or differential (on request)
  • Model-based design integration
  • Optional DACs, 1000 MSPS (Int. Modes), 16-bit
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PicoDigitizer 125 PicoDigitizer 250
A/D & D/A Specifications
Number of A/D Converters Up to 64 Up to 8
Maximum A/D Sampling Frequency 125 MSPS 250 MSPS
A/D Resolution 14 bits 14 bits
Number of D/A Converters Up to 32 16
Maximum D/A Sampling Frequency 1 GSPS * 1 GSPS*
D/A Resolution 16 bits 16 bits
RF Specifications
Maximum Bandwidth N/A N/A
Processor Specifications
FPGA Xilinx Virtex-6
CPU External PC or embedded Quad-Core i7
Software Tools
Model-based design (Simulink) Yes Yes
Data Transfer
PCIe Yes
GigE Yes
Recording Capacity
Recording Capacity Up to 8 GB Up to 8 GB
Form Factors
Power Consumption Typical: 45 watts** Typical: 45 watts
Dimensions  48.05 (H) x 215.00 (W) x 290.00 (D)** 48.05 (H) x 215.00 (W) x 290.00 (D)
Weight Up to 2.80 kg** Up to 2.80 kg

* With Interpolating Mode
** For the PicoDigitizer 125 32 ADC channels

Configurations

PicoDigitizer 126/16-E 125/32-E block diagram

PicoDigitizer 125/16-E  125/32-E

PicoDigitizer 125/16 125/32 block diagram

PicoDigitizer 125/16  125/32

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