The HDL Coder is a MATLAB toolbox used to generate synthesizable Verilog and VHDL codes for various FPGA and ASIC technologies. The Xilinx System Generator, on the other hand, is a Xilinx product used to generate parameterizable cores, specifically targeting Xilinx FPGAs. This application note draws a comparison between the design flows with these two toolboxes, especially in context of Software Defined Radios (SDRs), which all come with onboard FPGAs.
With the rapid advancement in FPGA design technologies, hardware and software providers have been working towards producing more advanced and user friendly tools for designing and testing FPGA programs. The emphasis lies on rapid prototyping of the FPGA design, even with minimal knowledge of Verilog and VHDL programming languages. To this end, two commonly used tools include MATLAB HDL Coder and Xilinx System Generator Blockset, both of which can be used with MATLAB Simulink. Both these tools enable the developers to use Simulink model environment, with drag and drop blocksets, for designing their algorithms without having to write a single line of VHDL code, even for very large and complex designs. In this brief article, we outline the design workflows using these toolboxes in context of SDRs.
MATLAB HDL Coder
The HDL Coder, provided by Mathworks, is a MATLAB toolbox which generates target-independent, portable and synthesizable Verilog and VHDL codes, which can then be used for FPGA programming and ASIC designing. The toolbox works with different MATLAB functions, Simulink Models and Stateflow charts, converting the MATLAB design into equivalent Verilog and HDL codes. In context of SDRs, especially Nutaq SDRs, the Simulink design environment is recommended for rapid prototyping. While designing with HDL Coder in Simulink, the first step is to filter the Simulink Library Browser, such that it only shows the model blocks that are compatible with the HDL Coder. To this end, by typing “hdllib” in MATLAB command prompt, one gets the Simulink Library Browser showing only the supported blocks. At present, HDL Coder supports over 200 Simulink blocks, including Stateflow charts. Using these blocks, one can design the required communication and signal processing logic as a Simulink model file, by dragging and dropping various blocks into the design. HDL coder automatically converts floating point numbers into fixed-point. Furthermore, functions written in MATLAB mcode can also be integrated into the design. To check design results via simulations, different MATLAB tools could be used, including scopes, displays, etc. Blocks from Simulink Sources library can be used to generate test signals for the design.