Video transcript:

Hi guys. Jean-Benoit Larouche here, field application engineer at Nutaq and recently I made a blog series on how to implement a complex digital signal processing application on a Xilinx device using system generator tools. As an example, I used Nutaq ZeptoSDR solution which is built around a Zynq processor to implement a counter which was purely created from a system generator model.

It was pretty simple but it worked well. And today we are going to put that concept further by implementing the complete Nutaq OFDM reference design on that same Zynq processor on the Nutaq ZeptoSDR.

So here is our system generator model. The model is divided in two main sections; the signal processing part and the hardware interfacing part. The signal processing portion is all made of system generator blocks. The top part takes 32 bit samples and modulates them ready for transmission over the air using the radio card of the ZeptoSDR.

The bottom part takes digitized samples coming from that same radio card analog to digital converters, modulate them and send the received bits to another device connected through an Ethernet cable. The hardware interfacing part is made of gateway blocks easily distinguishable by their yellow color, which create inputs and output ports to enable the OFDM physical layer to connect itself to the radio and Ethernet interface later.

Finally the system generator token on the left is configured to automatically create a pcore from the model. The next step is to import the generated pcore and plug the inputs and output ports created by the gateway blocks to the other interfaces. The three main interfaces are the radio card, the RTDEx, which is simply another name for the Ethernet interface, and the custom registers. When this is done the netlist compilation, synthesis and bitstream generation can be started.

Now that we have our final bitstream in hand it’s time for the hardware setup. So here I have my Nutaq ZeptoSDR box with two antennas; one for the transmitter and one for the receiver. And on the side I have my Ethernet cable to exchange data between my ZeptoSDR and my computer. There is many ways on the computer to actually interact with the platform; either with a C code application, either on the Windows or Linux operating system, but for demonstration purposes I prefer our unique new GNU radio plug in.

Here we are in my Linux virtual machine with new original software installed. The model includes a block with the IP address of my ZeptoSDR system and two blocks to configure the ZeptoSDR radio card. On the left we have some custom registers, which will enable me to interact with the OFDM physical layer in real time. And on the right we have our video file which will be our source. RTDEx sink and source blocks are used to transmit and receive data over the Ethernet cable. So let’s start by showing the received constellation.

We can see that the data is received and that our constellation is looking good thanks to the automatic calibration. Now using sliders we can change some custom registers value in real time and check the difference between an FPGA loopback and going through the radio card.

We can also switch the constellation order if we want to. Since the constellation is showing good results lets push the test further and let’s transmit these data outside of my virtual machine for radio reception. To do that we enable the UDP Sink block and rerun the model.

We can see that the video file is correctly received. So thanks for watching and don’t forget to visit our blog at