Multichannel DAQ systems are typically complex, and have relatively demanding needs.  From the sensor, to the I/O boards, to the processing unit, to the controlling computer there are many different components which contribute to the overall costs and complexities of the digital acquisition system.

For applications such as medical imaging (PET, MRI, MicroPET), radio astronomy, and linear accelerators, FPGAs can be highly effective (both in processing power & cost) solutions to the system designer.  In this post we will briefly discuss the use of FPGAs in multichannel DAQ systems including:

  • The benefits of massive parallel processing in the FPGA
  • Easy FPGA programming via a model-based design environment
  • Load optimization between the FPGA and other processors
[For further details on this subject, please see the Technical Article “Using FPGAs in Multichannel DAQ Systems” and the linked blog posts.]

Parallel Processing in Multichannel FPGA Based DAQ Systems

Processors like DSPs and GPPs (General Purpose Processors) work on data in a serial manner.  For multichannel systems where data is simultaneously coming from dozens or hundreds of sensors, sequential processing can quickly become a bottleneck in the system.

FPGAs, on the other hand, were built specifically to address the needs of massive parallel processing.  A Xilinx Virtex-6, for example, will typically have the necessary ALUs/DSP Slices, I/O ports, memory blocks etc to sustain the needs of system developers who might be trying to test the efficacy of a new pharmaceutical trial using a MicroPET, or keep a beam aligned in a particle accelerator.

If we consider a particular processing algorithm that needs to be implemented, we can use the specific building blocks within the FPGA to essentially replicate the original algorithm within the FPGA through a combination of parallel and sequential steps (see Figure 1 below).  Latency is kept lower than it would be in a sequential-only processor (see Figure 2 below), and the algorithm processing capabilities can be expanded as long as the necessariy FPGA resources are available.

Parallel & Sequential Processing in an FPGA

Figure 1.  Parallel & Sequential Processing in an FPGA

Sequential Processing in a GPP

Figure 2.  Sequential Processing in a GPP

Simple, Rapid FPGA Programming in a Model-Based Environment

For many, the programming requirements of an FPGA can be a significant obstacle…or at the very least, require a DAQ system designer to find a partner with the necessary HDL programming expertise.

Using the model-based design tools such as Simulink and Xilinx System Generator for DSP (for those targeting Xilinx FPGAs), one can easily deploy processing algorithms on the FPGA fabric without writing a single line of VHDL code.  The following image depicts a model-based design implementation done using blocks from Simulink, Xilinx SysGen, as well as Nutaq’s own Model-Based Design Kit software environment (in this example, our ADAC250 card is shown, which is an AD/DA card which will interface directly with a Xilinx Virtex-6 for processing requirements).

Model-based design example

Click image to expand.

Balancing the Load Between FPGAs and Other Processors

FPGAs are ideal for many of the processing needs where massive parallel computations are required.  However, when it comes to logical decisions such as “if this, then do that” the baton should be handed off to DSPs or GPPs.  Additionally, for tasks such as controlling the DAQ system, presenting a graphical user interface to the end user, or storing data that was captured by sensors and processed by the FPGA, the CPU of a computer is the best choice for the job.