Timing in Ethernet based packet networks
In packet based network, a large first-in first-out (FIFO) memory buffer in conjunction with a packet flow control protocol is used to prevent data slip due to the free-running clock frequency difference between transmitter and receiver as illustrated in Figure 1. The packet flow controller is always monitoring overflow/underflow status of the FIFO memory. If the FIFO is experiencing overflow, a pause request packet needs to be sent to the transmitter to halt the transmission for a period of time. If the FIFO has enough head room to receive packets, a resume transmission packet needs to be sent to the transmitter to continue the transmission. More details about the packet flow control protocol can be found in IEEE 802.3x Ethernet flow control standard.
Figure 1: Ethernet based timing
Synchronous Ethernet based packet networks
SyncE adds a building integrated timing supply (BITS) source traceable to a stratum 1 at every element of Ethernet networks that communicate with synchronous network elements. This leads to no data slip during data exchange between elements in different networks because all elements are traceable to the stratum1 clock source. For example, a wireless backhaul packet based core network connected to a synchronous network requires precise frequency synchronization for proper operation handover when mobile equipment is leaving/entering one cell from another cell as illustrated in Figure 2. Obviously, the free-running local clock of the element connects to a synchronous network replaced by a stratum 3 clock driven by the recovered Tx clock traceable to the external PRS stratum 1. Received data samples are re-timed to a local stratum 3 clock similar to the line-timing clock distribution in SONET/SDH networks.
Figure 2: Frequency synchronization between synchronous and asynchronous network elements
Precision time protocol (IEEE1588)
In the IEEE 1588 standard, timing relies on time stamp packets inserted into the data stream at elements having a master clock traceable to a stratum 1 source (the first element connects to the synchronous network). Timestamps are extracted at the slaves in order to generate a clock which is synchronized with the master’s clock, i.e. synchronized with the stratum 1 clock source. The advantage of packet based timing is elements between master and slave clocks can be asynchronous. More details about the PTP can be found in the ITU-T G.8261 standard.
The packet flow control, SyncE and PTP for packet based networks allows data exchange between elements in asynchronous networks without any data slip. PTP provides low deployment cost and simple implementation for embedded systems developers, and eliminates the need for extra equipment such as a stratum 3 clock with extra connections.
 Wikipedia, “Synchronous Ethernet,” [Online]. Available: http://en.wikipedia.org/wiki/Synchronous_Ethernet.
 Wikipedia, “Precision Time Protocol,” [Online]. Available: http://en.wikipedia.org/wiki/IEEE1588_Clock_Synchronization.
 Wikipedia, “Ethernet flow control,” [Online]. Avaiable: http://en.wikipedia.org/wiki/Ethernet_flow_control