. A DAQ includes:
- one or more sensors to convert physical attributes into electrical signals
- signal conditioning circuitry to transform sensor signals into a form that can then be converted to digital values
- analog-to-digital converters (ADC) to convert the conditioned sensor signals to digital values
The output of the DAQ is passed to a digital processing unit, as shown in the following figure:
Depending on the bandwidth of the ADC output and the nature of the processing, different digital signal processing solutions might be preferred. For low- to mid-speed DAQ (for example, audio processing and control applications, such as in the automotive industry), the digital samples are generally processed by a microprocessor or a processor. For high-speed DAQ and correlated multichannel applications (for example, digital pulse processing for positron emission tomography (PET) systems [2, 3]), conventional processors can’t handle the DAQ bandwidth. In this case, either the pre-processing or the entire processing chain needs to be done by dedicated hardware. FPGAs are well suited to processing high-bandwidth and high-channel-density signals for two main reasons:
- ease of multichannel synchronization and processing
- impressive digital processing performance
Multichannel Synchronization and Processing
In a multichannel system, the DAQ samples reach the FPGA in a parallel manner, as opposed to in a processor where the data needs to be serialized. Because of this, it’s easier to associate the samples with a specific time. Since the samples of all DAQ are available at the same time, processing requiring inter-channel operations is easily completed. Furthermore, there is no need to store fractions of all DAQ before starting the processing, which reduces the computation latency. To take a real-life example, Nutaq’s MI125 FMC paired with a Perseus AMC allows up to 32 channels at 125 MHZ to be acquired simultaneously on a Virtex™-6 FPGA from Xilinx®.
Digital Processing Performance
One of the advantages of FPGAs over general purpose processors (GPPs) is their huge number of arithmetic logic units (ALU). For Xilinx FPGAs, these ALUs are called DSP slices, and the numbers can vary from 288 to 2016 for their Virtex-6 family. Having so many ALUs makes it easy to parallelize the processing, as discussed in this post. For example, if the DAQ samples need to be filtered, it’s possible to match the number of filters to the number of DAQ. It’s also possible to use different DSP slices to compute different taps within the same filter. In addition, there are a lot of pre-built digital signal processing building blocks that are available and configurable for FPGAs (FFT, DDS, filters, trigonometric functions, etc.).
This huge amount of processing power can also be used in pre-processing. By using an FPGA in line with a DAQ, pre-processing (filtering, decimation or pulse detection as examples) can be performed by the FPGA and only the results transmitted to a host processor. Depending on the application, the number of samples to be processed by the GPP might then be reduced by several orders of magnitude.
FPGAs Provide Value in DAQ Systems
FPGAs are well suited to process high-speed and high-channel-density signals because of their ease of multichannel synchronization and processing, and impressive digital processing performance. As we discussed, these characteristics make FPGAs valuable components in a DAQ system.
- Wikipedia. 2013. “Data Acquisition.” http:/https://nutaq.com.wikipedia.org/wiki/Data_acquisition.
- Haselman, Michael, Robert Miyaoka, Thomas K. Lewellen, and Scott Hauck. 2008 “FPGA-Based Data Acquisition System for a Positron Emission Tomography (PET) Scanner.” ACM/SIGDA Symposium on Field-Programmable Gate Arrays. Monterey CA. http://reeves.ee.washington.edu/people/faculty/hauck/publications/PET_TimingPickoff.pdf
- Hu, Wei, et al. 2011. “Free-running ADC-and FPGA-based signal processing method for brain PET using GAPD arrays.” Nuclear Instruments and Methods in Physics Research A. doi:10.1016/j.nima.2011.05.053