PicoDigitizer 125-Series

A 16 or 32 channel high speed data acquisition solution. The benefits of a large FPGA without the coding hassle. Lowers the cost per channel & shortens development time. Built for demanding multi-channel applications.

PicoDigitizer 125-Series

The PicoDigitizer 125-Series presents developers with a large Virtex-6 FPGA which can optionally be used in conjunction with an embedded Quad Core i7.

16 or 32 phase coherent channels of high speed data, sampled at 125 MSPS with 14 bit resolution, are captured and processed in this small table top platform...yielding a solution that offers high processing power, high channel density, and a low system cost-per-channel.

To reduce overall system development time, designers can choose to use a model-based design approach (via Simulink) which enables real-time and hardware-in-the-loop co-simulation with the FPGA. Alternatively, a VHDL-based FPGA framework is also available.



PicoDigitizer 125-Series datasheet

Get detailed specifications on the PicoDigitizer 125-Series platform.



MI125 FMC Double Stack - 16 or 32 Channels at 125 MSPS (14 bit)

MI125 FMC Double Stack


High channel density means lower system costs...and a small footprint

Select either 16 or 32 phase coherent channels sampling at 125 MSPS. Our double-stack FMC technology not only saves you money, but also allows for a reduced footprint in our table top digitizer solution.

Shortened development time using model-based design

Simple flow diagram of model-based FPGA algorithm development

Shortened development time with fewer hardware cycles

A model-based design environment (MATLAB Simulink & Xilinx System Generator) means rapid transitions from algorithm design to hardware-in-the-loop testing. The net result is a development cycle that can be reduced by weeks or months.

Add to this the ability to automatically generate HDL code from the development environment and you have another significant source of reducing the time taken to develop your scientific or medical imaging applications.

Board support package with supplied drivers

Included board support package

Begin your "value add" development right away

The PicoDigitizer 125-Series ships with a software suite that contains all of the necessary IP cores, IO interfaces, and stand alone APIs need to enable immediate development of applications on the hardware.

PicoDigitizer 125-Series Stack

Stack of PicoDigitizer 125-Series Configurations


Built for intensive processing requirements...with optional FPGA-CPU mixed architecture

The large onboard Virtex-6 FPGA of the PicoDigitizer 125-Series can be used for demanding processing requirements such as:

  • Digital-pulse-processing
  • Up-conversion, down-conversion
  • Space-time coding
  • Beamforming

For those looking to balance power, speed, and performance, a Quad Core i7 can be embedded into the PicoDigitizer 125-Series.

Recording IP Core Block Diagram

Recording IP Core Block Diagram

Includes Recording IP core

Data exchange with the embedded or external CPU is enabled via either a GigE or PCIe interface, while data can be recorded using Nutaq’s multichannel Record & Playback IP core.


Hardware Features

  • Up to 32 channels coupled to Virtex-6 FPGA
  • Lowest cost per channel in the industry
  • Optional Intel Quad Core i7 (embedded version)
  • 125 MSPS, 14 bit resolution
  • GigE and 4xPCIe high speed readout interfaces
  • Phase aligned channels and phase coherent sampling enable applications such as beamforming

Software Features


  • Multichannel digital pulse processing (DPP)
  • Medical Imaging (PET / Ultrasound/MRI)
  • Digital Spectrometer
  • Industrial (Ultrasound)
  • Linear Accelerator (LINAC - LLRF/BPM)
  • Beamformers
  • Multichannel direction finding systems
  • Radio Astronomy


FPGA Supports LX240T, LX550T, SX315T and SX475T FPGA devices 
  Supports up to 2 PCIe (4x) interfaces; Supports GigE interface
  64MB NOR Flash
  128 MB DDR3 SRAM Dedicated for Nutaq CCE (Central Communication Engine application) and Microblaze Embedded Linux OS
  Includes a complete framework for Virtex-6 interfaces (Nutaq BSDK)
Embedded CPU Section CPU: Intel Quad-core i7 Gen2 CPU, 2.1 GHz processor
  64GB SSD
  GigE & Dual PCIe 4x support
  SATA –II/III support
Sampler Coupling AC or DC coupled ordering option
  Single-Ended or Differential inputs ordering option
Sample Characteristics 14 bit
  125 MSPS maximum
  16 or 32 channels
Sampling Clock Onboard crystal 125 MHz, 2 fsec RMS jitter
  External sampling CLK input
Performance Analog input Bandwidth : 80 MHz (-3dB)
  SNR (dB): 67 (@ 1 MHz) , 66 (@ 30 MHz), 64 (@ 70 MHz)
  SFDR (dBc): 70 (@ 1 MHz) , 75 (@ 30 MHz), 75-AC / 72-DC (@ 70 MHz)
  THD (dBc): 69 (@ 1 MHz) , 83 (@ 30 MHz), 80-AC / 73-DC (@ 70 MHz)
  Worst inter-channel Crosstalk (dBFS): 58-SE / 75-Diff (@ 30 MHz) 
  *AC = AC Coupled, DC = DC Coupled, SE = Single-Ended, Diff = Differential


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